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19-4784; Rev 0; 10/99
KIT ATION EVALU E AILABL AV
Low-Power, 16-Bit Smart ADC
General Description Features
o Low-Noise, 400A Single-Chip Sensor Signal Conditioning o High-Precision Front End Resolves Less than 1V of Differential Input Signal o On-Chip DSP and EEPROM Provide Digital Correction of Sensor Errors o 16-Bit Signal Path Compensates Sensor Offset and Sensitivity and Associated Temperature Coefficients o 12-Bit Parallel Digital Output o Analog Output o Compensates a Wide Range of Sensor Sensitivity and Offset o Single-Shot Automated Compensation Algorithm--No Iteration Required o Built-In Temperature Sensor o Three-State, 5-Wire Serial Interface Supports High-Volume Manufacturing
MAX1460
The MAX1460 implements a revolutionary concept in signal conditioning, where the output of its 16-bit analog-to-digital converter (ADC) is digitally corrected over the specified temperature range. This feature can be readily exploited by automotive, industrial, and medical market segments, in applications such as sensors and smart batteries. Digital correction is provided by an internal digital signal processor (DSP) and on-chip 128bit EEPROM containing user-programmed calibration coefficients. The conditioned output is available as a 12-bit digital word and as a ratiometric (proportional to the supply voltage) analog voltage using an on-board 12-bit digital-to-analog converter (DAC). The uncommitted op amp can be used to filter the analog output, or implement a 2-wire, 4-20mA transmitter. The analog front end includes a 2-bit programmablegain amplifier (PGA) and a 3-bit coarse-offset (CO) DAC, which condition the sensor's output. This coarsely corrected signal is digitized by a 16-bit ADC. The DSP uses the digitized sensor signal, the temperature sensor, and correction coefficients stored in the internal EEPROM to produce the conditioned output. Multiple or batch manufacturing of sensors is supported with a completely digital test interface. Built-in testability features on the MAX1460 result in the integration of three traditional sensor-manufacturing operations into one automated process: * Pretest: Data acquisition of sensor performance under the control of a host test computer. * Calibration and Compensation: Computation and storage of calibration and compensation coefficients determined from transducer pretest data. * Final Test Operation: Verification of transducer calibration and compensation, without removal from the pretest socket. The MAX1460 evaluation kit (EV kit) allows fast evaluation and prototyping, using a piezoresistive transducer (PRT) and a Windows(R)-based PC. The user-friendly EV kit simplifies small-volume prototyping; it is not necessary to fully understand the test-system interface, the calibration algorithm, or many other details to evaluate the MAX1460 with a particular sensor. Simply plug the PRT into the EV kit, plug the EV kit into a PC parallel port, connect the sensor to an excitation source (such as a pressure controller), and run the MAX1460 EV kit software. An oven is required for thermal compensation.
________________________Applications
Hand-Held Instruments Piezoresistive Pressure and Acceleration Transducers and Transmitters Industrial Pressure Sensors and 4-20mA Transmitters Smart Battery Charge Systems Weigh Scales and Strain-Gauge Measurement Flow Meters Dive Computers and Liquid-Level Sensing Hydraulic Systems Automotive Systems
Ordering Information
PART MAX1460CCM TEMP. RANGE 0C to +70C PIN-PACKAGE 48 TQFP
Customization
Maxim can customize the MAX1460 for unique requirements. With a dedicated cell library of more than 90 sensor-specific functional blocks, Maxim can quickly provide customized MAX1460 solutions, including customized microcode for unusual sensor characteristics. Contact Maxim for further information.
1
Functional Diagram appears at end of data sheet. Pin Configuration appears at end of data sheet. Windows is a registered trademark of Microsoft Corp.
________________________________________________________________ Maxim Integrated Products
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Low-Power, 16-Bit Smart ADC MAX1460
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD to VSS......................................-0.3V to +6V All Other Pins ...................................(VSS - 0.3V) to (VDD + 0.3V) Short-Circuit Duration, All Outputs .............................Continuous Continuous Power Dissipation (TA = +70C) 48-Pin TQFP (derate 12.5mW/C above +70C ).....1000mW Operating Temperature Range...............................0C to +70C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +5V, VSS = 0, fXIN = 2MHz, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER GENERAL CHARACTERISTICS Supply Voltage (Note 1) Supply Current (Note 2) Throughput Rate ANALOG INPUT Input Impedance Gain Temperature Coefficient (TC) Input-Referred Offset TC Common-Mode Rejection Ratio CMRR From VSS to VDD PGA gain code = 00 PGA Gain PGA Gain PGA gain code = 01 PGA gain code = 10 PGA gain code = 11 CO-DAC code = 111 CO-DAC code = 110 CO-DAC code = 101 Coarse Offset CO-DAC code = 100 CO-DAC code = 000 CO-DAC code = 001 CO-DAC code = 010 CO-DAC code = 011 ADC (Notes 3, 4) Resolution Integral Nonlinearity (Note 5) Input-Referred Noise Output-Referred Noise TEMPERATURE SENSOR (Note 6) Resolution Linearity TA = 0C to +70C 260 1.3 LSB/C C 5k input impedance INL PGA gain code = 00, CO-DAC code = 000 16 0.006 1700 2 Bits % nVRMS LSBRMS 43 59 74 90 -164 -111 -62 -10 -20 32 81 134 PGA AND COARSE-OFFSET DAC (Notes 3, 4) 46 61 77 93 -149 -96 -47 5 -5 47 96 149 49 64 80 96 -134 -81 -32 20 10 62 111 164 % VDD V/V RIN 1.0 40 1200 90 M ppm/C nV/C dB VDD IDD During operation Continuous conversion 4.75 5.0 400 15 5.25 700 V A Hz SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Low-Power, 16-Bit Smart ADC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V, VSS = 0, fXIN = 2MHz, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER OUTPUT DAC (Note 7) DAC Resolution Integral Nonlinearity Differential Nonlinearity UNCOMMITTED OP AMP Op Amp Supply Current Input Common-Mode Range Open-Loop Gain Offset Voltage (as unity-gain follower) Output Voltage Swing Output Current Range Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Input Capacitance DIGITAL OUTPUTS: D[11...0] Output Voltage Low Output Voltage High Three-State Leakage Current Three-State Output Capacitance Output Voltage Low Output Voltage High Three-State Leakage Current Three-State Output Capacitance VOL VOH IL COUT VOL VOH IL COUT ISINK = 500A ISOURCE = 500A CS = 0 CS = 0 (Note 10) ISINK = 500A ISOURCE = 500A CS = 0 CS = 0 (Note 10) 0.3 4.7 10 50.0 4.5 10 50.0 0.5 V V A pF V V A pF VIH VIL VHYST IIN CIN VIN = 0 or VDD (Note 10) 1.0 10 50.0 CMR AV VOS VIN = 2.5V (no load) No load VOUT = (VSS + 0.2V) to (VDD - 0.2V) 4.0 1.0 -30 VSS + 0.05 500 VSS + 1.3 60 +30 VDD - 0.05 100 VDD - 1.0 A V dB mV V A V V V A pF INL DNL 12 1 0.5 bits LSB LSB SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1460
DIGITAL INPUTS: START, CS1, CS2, SDIO (Note 8), RESET, XIN (Note 9), TEST
DIGITAL OUTPUTS: SDIO (Note 8), SDO, EOC, OUT
Note 1: EEPROM programming requires a minimum VDD = 4.75V. IDD may exceed its limits during this time. Note 2: This value does not include the sensor or load current. This value does include the uncommitted op amp current. Note that the MAX1460 will convert continuously if REPEAT MODE is set in the EEPROM. Note 3: See the Analog Front-End, including PGA, Coarse Offset DAC, ADC, and Temperature Sensor sections. Note 4: The signal input to the ADC is the output of the PGA plus the output of the CO-DAC. The reference to the ADC is VDD. The plus full-scale input to the ADC is +VDD and the minus full-scale input to the ADC is -VDD. This specification shows the contribution of the CO-DAC to the ADC input. Note 5: See Figure 2 for ADC outputs between +0.8500 to -0.8500. Note 6: The sensor and the MAX1460 must always be at the same temperature during calibration and use. Note 7: The Output DAC is specified using the external lowpass filter (Figure 8). Note 8: SDIO is an input/output digital pin. It is only enabled as a digital output pin when the MAX1460 receives from the test system the commands 8 hex or A hex (Table 4). Note 9: XIN is a digital input pin only when the TEST pin is high. Note 10: Guaranteed by design. Not subject to production testing.
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Low-Power, 16-Bit Smart ADC MAX1460
Pin Description
PIN 1, 2, 12, 13, 18, 19, 31, 32, 36, 41-45 3 4 5 6 7 8 9 10 11 14, 37, 38 15 16, 17 NAME FUNCTION
N.C.
No Connection. Not internally connected.
AGND START I.C. D6 D7 D8 D9 D10 D11 VDD VSS CS1, CS2
Analog Ground. Connect to VDD and VSS using 10k resistors (see Functional Diagram). Optional conversion start input signal, used for extending sensor warm-up time. Internally pulled to VDD with a 1M (typical) resistor. Internally Connected. Leave unconnected. Parallel Digital Output - bit 6 Parallel Digital Output - bit 7 Parallel Digital Output - bit 8 Parallel Digital Output - bit 9 Parallel Digital Output - bit 10 Parallel Digital Output - bit 11 (MSB) Positive Supply Voltage Input. Connect a 0.1F bypass capacitor from VDD to VSS. Pins 14, 37, and 38 must all be connected to the positive power supply on the PCB. Negative Supply Input Chip-Select Input. The MAX1460 is selected when CS1 and CS2 are both high. When either CS1 or CS2 is low, all digital outputs are high impedance and all digital inputs are ignored. CS1 and CS2 are internally pulled high to VDD with a 1M (typical) resistor. Serial Data Input/Output. Used only during programming/testing, when the TEST pin is high. The test system sends commands to the MAX1460 through SDIO. The MAX1460 returns the current instruction ROM address and data being executed by the DSP to the test system. SDIO is internally pulled to VSS with a 1M (typical) resistor. SDIO goes high impedance when either CS1 or CS2 is low and remains in this state until the test system initiates conversion. Serial Data Output. Used only during programming/testing. SDO allows the test system to monitor the DSP registers. The MAX1460 returns to the test system results of the DSP current instruction. SDO is high impedance when TEST is low. Reset Input. When TEST is high, a low-to-high transition on RESET enables the MAX1460 to accept commands from the test system. This input is ignored when TEST is low. Internally pulled high to VDD with a 1M (typical) resistor. End of Conversion Output. A high-to-low transition of the EOC pulse can be used to latch the Parallel Digital Output (pins D[11...0]). Parallel Digital Output - bit 0 (LSB) Parallel Digital Output - bit 1 Parallel Digital Output - bit 2
20
SDIO
21
SDO
22
RESET
23 24 25 26
EOC D0 D1 D2
4
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Low-Power, 16-Bit Smart ADC
Pin Description (continued)
PIN 27 28 29 30 33 34 35 39 40 46 47 48 NAME D3 D4 D5 OUT AMPOUT AMP+ AMPXOUT XIN INP TEST INM Parallel Digital Output - bit 3 Parallel Digital Output - bit 4 Parallel Digital Output - bit 5 Output DAC. The bitstream on OUT, when externally filtered, creates a ratiometric analog output voltage. OUT is proportional to the 12-bit parallel digital output. General-Purpose Operational Amplifier Output Noninverting Input of General-Purpose Operational Amplifier Inverting Input of General-Purpose Operational Amplifier Internal Oscillator Output. Connect a 2MHz ceramic resonator (Murata CST200) or crystal from XOUT to XIN. Internal Oscillator Input. When TEST is high, this pin must be driven by the test system with a 2MHz, 50% duty cycle clock signal. The resonator does not need to be disconnected in test mode. Positive Sensor Input. Input impedance is typically > 1M. Rail-to-Rail(R) input range. Test/Program Mode Enable Input. When high, enables the MAX1460 programming/testing operations. Internally pulled to VSS with a 1M (typical) resistor. Negative Sensor Input. Input impedance is typically > 1M. Rail-to-rail input range. FUNCTION
MAX1460
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
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Low-Power, 16-Bit Smart ADC MAX1460
Detailed Description
The main functions of the MAX1460 include: * Analog Front End: Includes PGA, coarse-offset DAC, ADC, and temperature sensor * Test System Interface: Writes calibration coefficients to the DSP registers and EEPROM * Test System Interface: observes the DSP operation. The sensor signal enters the MAX1460 and is adjusted for coarse gain and offset by the analog front end. Five bits in the configuration register set the coarse-offset DAC and the coarse gain of the PGA (Tables 1 and 2). These bits must be properly configured for the optimum dynamic range of the ADC. The digitized sensor signal is stored in a read-only DSP register. The on-chip temperature sensor also has a 3-bit coarse-offset DAC that places the temperature signal in the ADC operating range. Digitized temperature is also stored in a read-only DSP register. The DSP uses the digitized sensor, the temperature signals, and the correction coefficients to calculate the compensated and corrected output. The MAX1460 supports an automated production environment, where a test system communicates with a batch of MAX1460s and controls temperature and sensor excitation. The three-state digital outputs on the MAX1460 allow parallel connection of transducers, so that all five serial interface lines (XIN, TEST, RESET, SDIO, and SDO) can be shared. The test system selects an individual transducer using CS1 and CS2. The test system must vary the sensor's input and temperature, calculate the correction coefficients for each unit, load the coefficients into the MAX1460 nonvolatile EEPROM, and test the resulting compensation. The MAX1460 DSP implements the following characteristic equation: D = Gain 1 + G1T + G2 T 2
(
)
Signal + Of + Of T + Of T 2 + D 0 1 2 OFF where Gain corrects the sensor's sensitivity, G1 and G2 correct for Gain-TC, T and Signal are the digitized outputs of the analog front end, Of0 corrects the sensor's offset, Of1 and Of2 correct the Offset-TC, and DOFF is the output offset pedestal. The test system can write the calibration coefficients into the MAX1460 EEPROM or write to the DSP registers directly. The MAX1460 can begin a conversion using either the EEPROM contents or the register contents. When the test system issues commands, the MAX1460 is a serially controlled slave device. The test system observes the MAX1460 DSP operation in order to acquire the temperature and signal ADC results, to verify the calibration coefficients, and to get the output D. The MAX1460 places the contents of several important DSP registers on the serial interface after the tester issues a Start Conversion command. After calibration, compensation, and final test, the MAX1460 is adapted to its sensor and the pair can be removed from the test system. Use the resulting trans-
Table 1. Nominal PGA Gain Settings
PGA SETTING 0 1 2 3 PGA-1 0 0 1 1 PGA-0 0 1 0 1 NOMINAL GAIN (V/V) 46 61 77 93
Table 2. Typical Coarse Offset DAC Settings
CO SETTING -3 -2 -1 -0 +0 +1 +2 +3 6 CO-S 1 1 1 1 0 0 0 0 CO-1 1 1 0 0 0 0 1 1 CO-0 1 0 1 0 0 1 0 1 % VDD (at ADC input) -149 -96 -47 5 -5 47 96 149 PGA SETTING 0 (mV RTI) (VDD = 5V) -162 -104 -51 5 -5 51 104 162 PGA SETTING 1 (mV RTI) (VDD = 5V) -122 -79 -39 4 -4 39 79 122 PGA SETTING 2 (mV RTI) (VDD = 5V) -97 -62 -31 3 -3 31 62 97 PGA SETTING 3 (mV RTI) (VDD = 5V) -80 -52 -25 3 -3 25 52 80
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Low-Power, 16-Bit Smart ADC
ducer by applying power and the START signal. Latch the 12-bit parallel digital output using the EOC pulse. The maximum conversion rate of the MAX1460 is 15Hz, using a 2MHz resonator. If an analog output is desired, build a simple lowpass filter using the OUT pin, the uncommitted op amp, and a few discrete components (Figure 8).
Analog Front End, Including PGA, Coarse Offset DAC, ADC, and Temperature Sensor
Before the sensor signal is digitized, it must be gained and coarse-offset corrected to maximize the ADC dynamic range. There are 2 bits (four possible settings) in the configuration register for the PGA gain, and 3 bits (eight possible settings) for the CO DAC. The flowchart (Figure 1) shows a procedure for finding the optimum
MAX1460
-MAKE A TEST SYSTEM VARIABLE CALLED "NoMoreGain." -SET THE TEMPERATURE TO WHERE THE SENSOR'S SENSITIVITY IS HIGHEST. THIS IS NORMALLY COLD FOR SILICON PRTs. -SET THE PGA GAIN SETTINGS TO MINIMUM. -CLEAR THE VARIABLE "NoMoreGain."
-APPLY MIDSCALE EXCITATION TO THE SENSOR. -FIND THE COARSE OFFSET DAC SETTING WHERE THE DIGITIZED SIGNAL REGISTER IS CLOSEST TO ZERO (MIDSCALE).
-APPLY MAXIMUM SENSOR EXCITATION. -TEST FOR CLIPPING (DIGITIZED SIGNAL > 0.85).
-APPLY MINIMUM SENSOR EXCITATION. -TEST FOR CLIPPING (DIGITIZED SIGNAL < -0.85).
THE SENSOR SENSITIVITY VDD IS TOO LARGE. ADD A RESISTOR BETWEEN THE SERIES TOP OF THE BRIDGE RESISTOR AND VDD , THEN START OVER. YES DID ADC CLIP? IS THE PGA AT MINIMUM GAIN? YES
SENSOR NO NO
-REDUCE THE PGA GAIN ONE STEP. -SET THE VARIABLE "NoMoreGain."
IS THE PGA AT MAXIMUM GAIN?
NO IS "NoMoreGain" SET?
NO INCREASE THE PGA GAIN ONE STEP.
YES
YES
RECORD THE PGA AND COARSE OFFSET SETTINGS. CAUTION: CLIPPING IS STILL POSSIBLE FOR LARGE SENSOR'S OFFSET TC AND LARGE TEMPERATURE RANGES. IF NECESSARY, GUARDBAND AGAINST CLIPPING BY REDUCING THE 0.85 CLIPPING CONSTANTS ABOVE.
Figure 1. Flowchart for Determining PGA and CO Settings _______________________________________________________________________________________ 7
Low-Power, 16-Bit Smart ADC MAX1460
0.010 0.008 NONLINEARITY ERROR (%FS) 0.006 0.004 0.002 0 -0.002 0.004 -0.006 -0.008 -0.010 -100 -80 -60 -40 -20 0 20 40 60 80 100 SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%) ERROR (16-BIT LSBs)
4 3 2 1 0 -1 -2 -3 -4 -100 -80 -60 -40 -20 0 20 40 60 80 100 SENSOR SIGNAL INPUT OR ADC INPUT RANGE (%)
Figure 2a. Analog Front-End INL (typical)
Figure 2b. Analog Front-End Differential Nonlinearity (DNL) (typical)
4.0 NOISE STANDARD DEVIATION (16-BIT LSBs) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -100 -80 -60 -40 -20 0 20 40 60 80 100 SENSOR SIGNAL INPUT OR ADC INPUT/OUTPUT RANGE (%)
Figure 2c. Analog Front-End Noise Standard Deviation of the Samples (typical)
analog front-end settings when the sensor's characteristics are unknown. Use the tabulated values (Tables 1 and 2) if the peak sensor excursions are known. See the Test System Interface section for details on writing these analog front-end bits. The PGA gain and the CO are very stable, but are not accurate. Manufacturing variances on the gain and offset of the MAX1460 analog front-end superposition the residual sensor errors, and are later removed during final calibration. For example, suppose the sensor's sensitivity is +10mV/V with an offset of -12mV/V. Let the supply volt8
age be +5V. The full scale (-FS) output of the sensor is then +5V(-12mV/V) = -60mV; +FS is then +5V (-12mV/V + 10mV/V) = -10mV. Following through the flowchart, the PGA gain setting is +3 (gain = 93V/V) and the CO correction setting is +1 (+25mV RTI) - (Referred-to Input). The coarsely corrected -FS input to the ADC is (-60mV + 25mV)93 = -3.255V. The +FS input to the ADC is (-10mV + 25mV)93 = +1.395V. The input range of the ADC is VDD. Thus the maximum and minimum digitized sensor signals become -3.255 / 5 = -0.651 and +1.395 / 5 = +0.279. Notice that the bridge multiplies the signal by VDD and the ADC divides the signal by VDD. Thus, the system is ratiometric and not dependent on the DC value of VDD. The ADC output clips to 1.0 when input values exceed VDD. The best signal-to-noise ratio (SNR) is achieved when the ADC input is within 85% of VDD (Figure 2). The MAX1460 includes an internal temperature-sensing bridge allowing the MAX1460 temperature to be used as a proxy for the sensor temperature. For this reason, the MAX1460 must be mounted in thermal proximity to the sensor. The output of the temperature-sensing bridge is also corrected by a 3-bit coarse-offset DAC and processed by the ADC. The selection of the Temperature Sensor Offset (TSO) bits in the configuration register should be made so that the digitized temperature signal is as close to 0.0 as possible at midscale temperature. This is done to maximize the dynamic range of the thermal-calibration coefficients (Table 3).
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Low-Power, 16-Bit Smart ADC MAX1460
MIN 16 CLK CYCLES XIN
00 01 02 03 29 30 31
00 01 02 03
29 30 31
00 01 02 03 29 30 31
00 01 02 03 29 30 31
TEST RESET
SDIO
D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU D0 D1 D2 D3 C3 NU NU COMMAND 1 COMMAND 2 COMMAND 3 COMMAND n
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 E0 E1 LSB REGISTER DATA FIELD MSB LSB
E2 E3 E4 E5 E6 R0 R1 R2 C0 C1 C2 C3 NU NU MSB LSB MSB LSB MSB REG. COMMAND ADD
EEPROM ADDRESS FIELD
NOTE: ALL TRANSITIONS MUST OCCUR WITHIN 100ns OF THE XIN CLOCK EDGE.
Figure 3. Test-System Command Timing Diagram
Table 3. Temperature Sensor Offset (TSO) Settings
TSO TSO-2 SETTING 0 1 2 3 4 5 6 7 0 0 0 0 1 1 1 1 TSO-1 0 0 1 1 0 0 1 1 TSO-0 0 1 0 1 0 1 0 1 TEMPERATURE BRIDGE OFFSET Maximum - - - - - - Minimum
tion on RESET begins a 32-bit serial transfer of the testsystem command word through SDIO. The test system transitions SDIO on falling edges of the XIN clock; the MAX1460 latches data is on the rising edge (Figure 3). The 32-bit command word generated by the test-system is divided into four fields (Figure 3). The 4-bit command field is interpreted in Table 4. The other fields are usually ignored, except that command 1 hex uses the two register fields, and command 2 hex requires an EEPROM address. The command word fields are: * Register Data Field: Holds the calibration coefficients to be written into the MAX1460 16-bit registers * EEPROM Address Field: Holds the hexadecimal address of the EEPROM bit to be set (from 00 hex to 7F hex) * Register Address Field: Contains the address of the register (0 to 7) where the calibration coefficient is to be written * Command Field: Instructs the MAX1460 to take a particular action (Table 4)
Test-System Interface: Writing Calibration Coefficients to the DSP Registers and EEPROM
To make the MAX1460 respond to commands from the test system, raise the TEST pin and drive XIN with a 2MHz clock signal. It is not necessary to remove the resonator. RESET must be low for at least 16 clock cycles to initialize the MAX1460. Then, a rising transi-
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Low-Power, 16-Bit Smart ADC MAX1460
Table 4. Test System Commands
COMMAND Write a calibration coefficient into a DSP register. Block-Erase the entire EEPROM (writes "0" to all 128 bits). Write "1" to a single EEPROM bit. NOOP (NO-OPeration) Start Conversion command. The registers are not updated with EEPROM values. SDIO and SDO are enabled as DSP outputs. Start Conversion command. The registers are updated with EEPROM values. SDIO and SDO are enabled as DSP outputs. Start Conversion command. The registers are not updated with EEPROM values. SDIO and SDO are disabled. Start Conversion command. The registers are updated with EEPROM values. SDIO and SDO are disabled. Reserved HEX CODE 1 hex 4 hex 2 hex 0 hex 8 hex A hex C hex E hex 3, 5, 6, 7, 9, B, D, F hex C3 0 0 0 0 1 1 1 1 C2 0 1 0 0 0 0 1 1 C1 0 0 1 0 0 1 0 1 C0 1 0 0 0 0 0 0 0
-
-
-
-
Table 5. DSP Calibration Coefficient Registers
COEFFICIENT Gain G1 G2 Of0 Of1 Of2 DOFF REGISTER ADDRESS 1 2 3 4 5 6 7 FUNCTION Gain correction Linear TC gain Quadratic TC gain Offset correction Linear TC offset Quadratic TC offset Output midscale pedestal RANGE -32768 to +32767 -1.0 to +0.99997 -1.0 to +0.99997 -1.0 to +0.99997 -1.0 to +0.99997 -1.0 to +0.99997 -32768 to +32767 FORMAT Integer Fraction Fraction Fraction Fraction Fraction Integer
Writing to the DSP Registers Command 1 hex writes calibration coefficients from the test system directly into the DSP registers. Tester commands 8 hex and C hex cause the MAX1460 to start a conversion using the calibration coefficients in the registers. This direct use of the registers speeds calibration and compensation because it does not require EEPROM write-access time. Bringing RESET low clears the DSP registers, so the test system should always write to the registers and start a conversion in a single command timing sequence. As shown in Table 5, seven registers hold the calibration coefficients of the characteristic equation [DOUT = Gain (1+G1T + G2T2) (Signal + Of0 + Of1T + Of2T2) + DOFF] implemented by the MAX1460 DSP. All of the registers are 16-bit, two's complement coding format. When a register is interpreted as an integer, the decimal range is from -32768 (8000 hex) to +32767 (7FFF
10
hex). Fractional coefficient values range from -1.0 (8000 hex) to +0.99997 (7FFF hex). The register at address 0 is called the Configuration Register. It holds the coarse offset, PGA gain, Op Amp Power-Down, temperature-sensor offset, repeat mode, and reserved bits, as shown in Table 6. The functionality of the coarse offset, PGA gain, and temperature-sensor bits are described in the Analog Front End section. The Op Amp Power-Down bit enables the uncommitted op amp when set. The repeat-mode bit is tested by the last instruction of the DSP microcode, and, if set, immediately initiates another conversion cycle. The Maxim reserved bits should not be altered.
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Low-Power, 16-Bit Smart ADC
Table 6. Configuration Register Bitmap
EEPROM ADDRESS (HEX) 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 BIT POSITION 0 (LSB) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (MSB) DESCRIPTION CO-0 (LSB) CO-1 (MSB) CO-S (Sign) PGA-1 (MSB) PGA-0 (LSB) Maxim Reserved Maxim Reserved Op Amp Power-Down Maxim Reserved TSO-0 (LSB) TSO-1 TSO-2 (MSB) Maxim Reserved Maxim Reserved Maxim Reserved Repeat Mode
sarily long because the internal charge pump must create and maintain voltages above 20V long enough to cause a reliably permanent change in the memory. Writing an EEPROM bit requires 6ms, so writing the EEPROM typically requires less than 400ms. Do not decrease the EEPROM write times. To write an EEPROM bit, the test system must be compliant with the Command Timing Diagram shown in Figure 3, performing the following operations: 1) Issue command 0 hex, including the EEPROM address field of the bit to be written. 2) Issue command 2 hex, with the address field used in step 1. Continuously repeat this command 375 times (6ms). 3) Issue command 0 hex, including the EEPROM address field used in steps 1 and 2. The procedure for using command 4 hex (Block-Erase the EEPROM) is similar. Record the Maxim Reserved bits in the configuration register prior to using this command, and restore them afterwards. The number of Block-Erase operations should not exceed 100. 1) Issue command 0 hex. 2) Issue command 4 hex. Continuously repeat this command 375 times (6ms). 3) Issue command 0 hex.
MAX1460
Writing to the Internal EEPROM The test system writes to the EEPROM with commands 4 hex (Block-Erase the entire EEPROM), 2 hex (Write "1" to a single EEPROM bit) and 0 hex (NOOP). During normal operation (when the TEST pin is low) or when the test system issues instructions A hex or E hex (Start conversion from EEPROM values), the DSP reads the Calibration Coefficients from the EEPROM. In the normal production flow, determine the calibration coefficients using direct register access. Then load the calibration coefficients into the EEPROM with tester instruction 2 hex. Instruction 4 hex block-erases the EEPROM and is necessary only for a rework or reclaim operation. For each part, the Maxim reserved bits in the Configuration Register should be read before instruction 4 hex is issued, and restored afterwards. The MAX1460 is shipped with its internal EEPROM uninitialized, except for the reserved bits. The internal 128-bit EEPROM is arranged as eight 16bit words. These eight words are the configuration register and the seven calibration-coefficient values (Table 7). The MAX1460 EEPROM is bit addressable. The final calibration coefficients must be mapped into the EEPROM locations that are to be set. There is no bitclear instruction. Any EEPROM write operation is neces-
Test System Interface: Observing the DSP Operation
Test system commands 8 hex and A hex initiate a conversion while allowing the test system to observe the operation of the DSP. To calibrate a unit, the test system must know the digitized temperature and sensor signals, stored in DSP registers 8 and 9, and the calibrated and compensated output stored in DSP register 10. The test system should also verify the EEPROM contents, registers 0-7. All these signals pass through DSP register S during the execution of the instruction ROM microcode. The SDO pin outputs the S register values, and the SDIO pin tells the tester which signal is currently on S.
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Low-Power, 16-Bit Smart ADC MAX1460
Table 7. EEPROM Memory Map
EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents EE Address (hex) Contents 10 MSB 20 MSB 30 MSB 40 MSB 50 MSB 60 MSB 70 MSB 00 MSB 7F 7E 7D 7C 7B 7A 79 6F 6E 6D 6C 6B 6A 69 Of2 78 77 76 75 74 73 72 5F 5E 5D 5C 5B 5A 59 Of1 68 67 66 65 64 63 62 4F 4E 4D 4C 4B 4A 49 Of0 58 57 56 55 54 53 52 3F 3E 3D 3C 3B 3A 39 G2 48 47 46 45 44 43 42 2F 2E 2D 2C 2B 2A 1F 1E 1D 1C 1B 1A 0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 LSB 17 16 15 14 13 12 11 LSB 27 26 25 24 23 22 21 LSB 38 37 36 35 34 33 32 31 LSB 41 LSB 51 LSB 61 LSB 71 LSB Configuration 19 18
Gain 29 G1 28
DOFF
Table 8. Subset of DSP Instruction
INSTRUCTION CODE (PS) (HEX) D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 EA PROGRAM COUNTER (P) (HEX) 66 or 6C 47 11 2E 38 03 22 56 01 3B 65 or 6B S REGISTER VALUE Register 0--Configuration Register 1--Gain Register 2--G1 Register 3--G2 Register 4--Of0 Register 5--Of1 Register 6--Of2 Register 7--DOFF Register 8--Temperature Signal Register 9--Sensor Signal Register 10--Compensated Output D
There are three internal DSP registers that are directly observable on the SDIO and SDO pins: * S: 16-bit DSP Scratch or Accumulator register, containing the result of the execution of the current microcode instruction. * P: 8-bit DSP Program Pointer register, which holds the address of the instruction ROM microcode. * PS: 8-bit DSP Program Store register. PS is the instruction that the DSP is currently executing. PS is the instruction ROM data at address P. The DSP instructions relevant to the test system are listed in Table 8. After the test system sends the Start Conversion commands 8 hex or A hex, SDIO and SDO are both enabled as MAX1460 serial outputs. The test system should disable (high impedance) its SDIO driver to avoid a bus conflict at this time so that the MAX1460 can drive the pin. After the DSP executes each one of the microcode instructions, the contents of the registers S, P, and PS are output in a serial format (Figure 4). A new DSP instruction and a new state of the S, P, and PS registers are delivered every 16n + 9 clock cycles, where n = 0, 1, 2... after the Start Conversion command completes. The tester should latch the SDIO and SDO
12
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Low-Power, 16-Bit Smart ADC MAX1460
(16 n + 9)th CLOCK CYCLE XIN LSB SDO MSB
(16 (n + 1) + 9)th CLOCK CYCLE
S12 S13 S14 S15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 LSB MSB LSB MSB
SDIO
PS4 PS5 PS6 PS7 P0 P1 P2 P3 P4 P5 P6 P7 PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 P0 P1 P2 P3 P4 P5 P6 P7 PS0 PS1 PS2 PS3 DSP CYCLE n-1 DSP CYCLE n DSP CYCLE n+1
NOTE: ALL TRANSITIONS MUST OCCUR WITHIN 100ns OF THE XIN CLOCK EDGE.
Figure 4. DSP Serial Output Timing Diagram
tCONV VDD tWARM START (OPTIONAL)
tADC
SDIO & SDO (TEST MODE)
tDSP
D [11...0]
EOC tEOC
Figure 5. MAX1460 Conversion Timing
bits on the falling edge of the XIN clock signal. When the P and PS registers in Table 8 appear on SDIO, the tester should save the corresponding SDO data. The conversion timing of the MAX1460 is shown in Figure 5 and Table 9. In the figure, the conversion is initiated by a rising transition on the START pin. Equivalently, conversion can be initiated in TEST mode after completion of tester commands 8 hex or A hex, or reinitiated by the state of the Repeat Mode bit in the configuration register. After a conversion is initiated, the 16-bit ADC digitizes the temperature and sensor signals during t ADC . Then, the DSP executes the
instruction ROM microcode during tDSP. In TEST mode, and during tDSP, SDIO and SDO outputs carry useful information. At 130,586 clock cycles after the Start Conversion command is received, the LSB of the S and P DSP registers is available on SDO and SDIO. The last DSP instruction is D0 hex. The tester can now start a new communication sequence by lowering the RESET pin for at least 16 clock cycles, and then resume driving SDIO. SDIO becomes high impedance when RESET is low.
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13
Low-Power, 16-Bit Smart ADC MAX1460
Table 9. MAX1460 Conversion Timing
PARAMETER Sensor Warm-Up Time ADC Time DSP Time EOC Pulse Width Conversion Time SYMBOL tWARM tADC tDSP tEOC tCONV MIN 35 130,585 3,220 8 133,805 MAX UNITS ms XIN clk cycles XIN clk cycles XIN clk cycles XIN clk cycles
--
130,585 3,364 8 133,949
Applications Information
Calibration and Compensation Procedure
Perform fine calibration by characterizing the sensor/ MAX1460 pair using the test system and then finding the calibration coefficients Gain, G1, G2, Of0, Of1, and Of2 using the equations below. This simple fine-calibration procedure requires three temperatures, denoted A, B, and C, and two sensor excitations, named S and L for small and large. Thus, there are six data points (AS, AL, BS, BL, CS, and CL); six unknown calibration coefficients; and six versions of the characteristic equation, in the form:
Equation (1)
The AL and AS versions of equation 1 may be ratioed to obtain:
Equation (2a)
SignalAL - x Similarly,
Equation (2b)
SignalAS
1- x
+ Of0 + Of1TA + Of2 TA = 0
2
SignalBL - x
Equation (2c)
SignalBS SignalCS
1- x SignalCL - x where
Equation (3)
+ Of0 + Of1TB + Of2 TB = 0
2
DL - DOFF = Gain 1 + G1TC + G2 TC2 Signal + Of + Of T + Of T 2 CL 0 1C 2C where DL, DS, and DOFF are determined by the end product specification. DL is the desired MAX1460 output corresponding to the L sensor excitation; DS is the desired MAX1460 output corresponding to the S sensor excitation; DOFF is the desired midscale output; SignalCL is the digitized sensor reading at temperature C with the L sensor excitation applied; and TC is the digitized temperature reading at temperature C. Unstable digitized temperature readings indicate that thermal equilibrium has not been achieved, necessitating increased soak times or a better thermal control. Averaging many readings from the MAX1460 will help filter out AC variations in the sensor excitation and oven temperature. Begin calibration by soaking the sensor and the MAX1460 pair at the first temperature, A, and apply the L excitation to the sensor. Start a conversion and record the digitized temperature TA and the digitized signal SignalAL. Apply the S sensor excitation, and record the digitized signal SignalAS. Repeat this procedure for temperatures B and C, recording TB, SignalBL, SignalBS, TC, SignalCL, and SignalCS.
14
1- x
+ Of0 + Of1TC + Of2 TC = 0
2
x=
DL - DOFF DS - DOFF
Equations 2a, 2b, and 2c form a system of three linear equations, with three unknowns, Of 0, Of 1, and Of2. Solve for Of0, Of1, and Of2. The small sensor excitation versions of Equation 1 can be ratioed to obtain:
Equation (4a)
(YCS - YAS ) + G1 (TA YCS - TC YAS ) +
G2 TA 2 YCS - TC2 YAS = 0
Equation (4b)
(YCS - YBS ) + G1 (TB YCS - TC YBS ) +
G2 TB 2 YCS - TC2 YBS = 0
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Low-Power, 16-Bit Smart ADC MAX1460
UNCOMPENSATED SENSOR ERROR
10 8 6 ERROR (%FSO) 4 2 0 -2 -4 -6 -8 -10 0 10 20 30 40 50 60 70 TEMPERATURE (C) OFFSET RD2 10k FSO RD1 10k VDD OUT UNFILTERED BITSTREAM AGND AMP+ R1 500k AMPMAX1460 OP AMP AMPOUT FILTERED ANALOG OUTPUT RF 500k CF 1F
Figure 6. Sensor Characteristics Before Compensation COMPENSATED TRANSDUCER ERROR
0.20 0.15 ERROR (% SPAN, 4000 CODES) 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 0 10 20 30 40 50 60 70 TEMPERATURE (C) OFFSET FSO
Figure 8. Filtering the Output DAC Equation (5c)
YCS =
DS - DOFF SignalCS + Of0 + Of1TC + Of2 TC2
Equations 4a and 4b form a system of two linear equations and two unknowns, G1 and G2. Solve for G1 and G2. Equation 1 can now be readily solved for the last unknown, Gain. Arithmetic manipulation can magnify measurement errors and noise. Quantization of the calibration coefficients is another reason to consider adjusting the Gain and DOFF coefficients. To do this, load the MAX1460 registers with the calculated coefficients Gain, G1, G2, Of0, Of1, Of2, and DOFF. Assuming the oven is still at temperature C and the S sensor excitation is still applied, measure the output DCS. Change to the L sensor excitation, and measure DCL. Compute the new Gain coefficient using equation 6. Remeasure DCL, and compute the new DOFF coefficient, given by equation 7.
Equation (6) 2
Figure 7. Compensated Sensor/MAX1460 Pair
where:
Equation (5a)
YAS =
Equation (5b)
DS - DOFF SignalAS + Of0 + Of1TA + Of2 TA
GAINnew = Gain
Equation (7)
DL - DS DCL - DCS
YBS =
DS - DOFF SignalBS + Of0 + Of1TB + Of2 TB 2
DOFFnew = DOFF + DL - DCL The final calibration coefficients may now be written into the MAX1460 EEPROM. The unit is now ready for final test.
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15
Low-Power, 16-Bit Smart ADC MAX1460
This algorithm minimizes the error directly at the six test conditions, AS, AL, BS, BL, CS, and CL. Space the temperatures A, B, and C widely to minimize the signalto-noise ratio of the measurement. If there is a large error remaining in the finished product, move the calibration temperatures closer to the peak error temperatures. Similarly, full-scale sensor excitation may not be the best calibration condition if the sensor has nonlinearities. Move S and L away from full scale. Figure 6 shows the characteristics of an individual Lucas-NovaSensor model NPH8-100-EH, 0 to 15psig, silicon pressure sensor. Figure 7 shows the result of the compensated sensor/MAX1460 pair.
MAX1460 Evaluation/ Development Kit
The MAX1460 evaluation kit (EV kit) speeds the development of MAX1460-based transducer prototypes and test systems. First-time users of the MAX1460 are strongly encouraged to use this kit, which includes: 1) Evaluation board, with a MAX1460 sample and a silicon pressure sensor, ready for customer evaluation. 2) Interface board that must be connected to a PC parallel port. 3) MAX1460 communication/compensation software (Windows compatible), which enables programming of the MAX1460 one module at a time. 4) Detailed Design/Applications manual, developed for sensor-test engineers. The evaluation kit order number is MAX1460EVKIT.
Using the Compensated Sensor/MAX1460 Pair
After calibration and removal from the test system, the MAX1460 and the sensor form a mated pair. The START pin can be connected to VDD or left unconnected if the sensor does not require a significant warm-up time. Now operation is simple: just apply power and latch the parallel output D when EOC falls. Temperature is digitized during the first half of tADC, so the MAX1460 provides a minimum sensor warm-up time of 35ms. Using a 2MHz resonator, the conversion time tCONV is nominally 67ms. If the Repeat Mode bit is set, conversions repeat at a rate of 15Hz. If the sensor requires more than 35ms of warm-up time, the START pin may be used to initiate conversion (Figure 5). If the Repeat Mode bit is set, START should remain high. If the Repeat Mode bit is reset, START may be used to externally control the conversion rate of the MAX1460. After the 12-bit parallel output D is latched, end the conversion by taking START low for at least one clock cycle. The output DAC converts the parallel digital output into a serial bitstream on OUT. A simple external lowpass filter, using the MAX1460 op amp, converts the OUT bitstream into a ratiometric analog voltage (Figure 8). The filter shown is an inverting configuration, but the Gain and DOFF coefficients of the characteristic equation can be adjusted to obtain either polarity. If the op amp is not used, it can be powered down using the Op Amp Power-Down bit in the configuration register. The MAX1460 requires a minimum of external components: * One power-supply bypass capacitor (C1) from VDD to VSS. * One 2MHz ceramic resonator (X1). * Two 10k resistors for the AGND pin. * If an analog output is desired, two 500k resistors and a 1F capacitor are needed for filtering.
16
Pin Configuration
N.C. XIN XOUT
41 40 39
INM TEST
INP N.C. N.C.
N.C. N.C.
48
47
46
45
44
43
42
38
37
VDD VDD
N.C. N.C. AGND START I.C. D6 D7 D8 D9 D10 D11 N.C.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
36 35 34 33 32 31 30 29 28 27 26 25
N.C. AMPAMP+ AMPOUT N.C. N.C. OUT D5 D4 D3 D2 D1
MAX1460
SDO RESET EOC
N.C. N.C. SDIO
N.C. VDD
VSS CS1 CS2
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D0
Low-Power, 16-Bit Smart ADC
Functional Diagram
CS1 +5V 10k AGND 10k 2MHz RESONATOR XIN X1 XOUT VDD C1 0.1F CONFIGURATION REGISTER TEMPERATURE SENSOR CORRECTION COEFFICIENTS REGISTERS 16-BIT DIGITAL SIGNAL PROCESSOR (DSP) 12-BIT DIGITAL OUTPUT INP REF = VDD 16-BIT ADC MUX TEMPERATURE & SENSOR SIGNAL REGISTERS OSCILLATOR CONTROL LOGIC EEPROM INSTRUCTION ROM REF = VDD DAC OUT CS2 START TEST RESET SDIO SDO EOC AMP- AMP+
MAX1460
MAX1460
16-BIT INTERFACE TO ALL SIGNALS OP AMP AMPOUT
+5V
D [11...0]
PGA & COARSE OFFSET CORRECTION
INM VSS SENSOR
Chip Information
TRANSISTOR COUNT: 59,855 SUBSTRATE CONNECTED TO VSS
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17
Low-Power, 16-Bit Smart ADC MAX1460
NOTES
18
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Low-Power, 16-Bit Smart ADC MAX1460
NOTES
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19
Low-Power, 16-Bit Smart ADC MAX1460
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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